I'm not a chip designer, but how practical would it be for Apple to try to make a CPU that has good hardware support for both ARM and x86/x86-64 binaries?
It's a radical direction, but they are designing the chip by themselves and for themselves, they have deep pockets, and if it worked well it would reduce an important risk.
There are already several chips capable of running multiple instruction sets. Most desktop machines have chips that can run either x86 or x84-64. Some(?) ARM chips have a Thumb mode. So that seems very practical, and obviously there is a bigger "impedance mismatch" when trying to do both x86 and ARM on the same chip, how much worse is it?
If you could do some kind of hardware real-time instruction translation without wasting much silicon and without reducing performance (for x86) that much, it seems like it would take a lot of the pain out of the transition.
I'm not a chip designer either, but IIRC, the current architectures are actually something similar, whereas the CISC is broken down into custom RISC-ish instructions by a HW layer, which is then executed by the RISC-ish cores.
And while it might be doable (x64 and ARM on the same chip), I think it might not be a smart decision, since some things will not function correctly or will have to be redone (e.g. speculative execution).
I don't know either architectures on a deep understanding level (x64 or ARM), but I have a feeling that there should be some big architectural changes that would prevent x64 code to run on ARM natively.
It's a radical direction, but they are designing the chip by themselves and for themselves, they have deep pockets, and if it worked well it would reduce an important risk.
There are already several chips capable of running multiple instruction sets. Most desktop machines have chips that can run either x86 or x84-64. Some(?) ARM chips have a Thumb mode. So that seems very practical, and obviously there is a bigger "impedance mismatch" when trying to do both x86 and ARM on the same chip, how much worse is it?
If you could do some kind of hardware real-time instruction translation without wasting much silicon and without reducing performance (for x86) that much, it seems like it would take a lot of the pain out of the transition.