My microcode experience is some years ago, and nothing nearly as complicated as modern Intel stuff, but depending on just what you can control, you might be able to induce excessive thermal gradients by working some bits flat out and disabling/not dispatching to others. I don't know if the effect would be anything like significant enough to cause damage, although I have seen an excellent project using thermal regional heating to "fingerprint" cores post-fab. I think that required some (but not excessive) physical layout constraints as well.
Modern Intel chips will automatically adjust their clocking if they detect that they're suffering thermal stress. Further, I'm not sure whether microcode has that level of control over dispatch. Especially given the trace cache design of Intel chips, it seems very unlikely that scheduling information would be encoded into the microcode instead of dynamically decided during the out of order execution.
Don't get me wrong, I'm not saying it isn't possible to affect the chip's thermal profile in any way via a microcode update, I'm simply saying it's not the simplest way to do it and I doubt that Intel protects their microcode as fiercely as they do because of thermal concerns.
